1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device, and more particularly, to a method of simultaneously forming a high-voltage device and a low-voltage device.
2. Description of the Prior Art
With a trend toward scaling down the size of semiconductor devices, the conventional poly-silicon gate has faced problems such as inferior performance due to boron penetration and unavoidable depletion effect which increases equivalent thickness of the gate dielectric layer, reduces gate capacitance, and worsens a driving force of the devices. Therefore, work function metals that are suitable for use as the high-k gate dielectric layer are used to replace the conventional poly-silicon gate to be the control electrode.
The conventional metal gate methods are categorized into gate first processes and gate last processes. In a conventional gate first process, the annealing process for forming the source/drain ultra-shallow junction, and the silicide process are performed after forming the metal gate. In the conventional gate last process, a sacrificial gate or a replacement gate is provided and followed by performing processes used to construct a normal MOS transistor. Then, the sacrificial/replacement gate is removed to form a gate trench. Consequently, the gate trench is filled with metals according to the different electrical requirements. However, because of the complicated steps of the gate last processes, the manufacturers are devoted to simplifying the manufacturing process.
Moreover, integrated circuits (ICs) containing both high-voltage and low-voltage devices such as high/low voltage MOS transistor devices are known in the art. For example, the operation voltage of the low-voltage device is about 0.9V and the operation voltage of the high-voltage device is about 1.8V. In general, the high-voltage device requires a thicker gate dielectric layer. Nevertheless, whether in gate first processes or gate last processes, the requirement to simultaneously form the high-voltage device with thicker gate dielectric layer and the low-voltage device with thinner gate dielectric layer is seldom considered.